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It's my ELE3199 project. I wanted to make something combining FPGA,
emulation of video game console and some interesting output. I recreated some
hardware found in Super Nintendo to produce sound. More information on
SNES sounds on Wikipedia.
My project plays .SPC files stored in a FLASH memory. .SPC files contain memory state of SNES sound module just before a game starts to play a tune. By loading the state in the system memory, the hardware resume execution of the game music program.
SNES sound hardware is mainly 2 parts:
S-SMP : a 8 bit microprocessor executing a pogram. In my project, this device is emulated in software with some hardware accelerator. The software is a port of SNES9X to NIOS II configurable processor.
D-DSP : decodes and mix sound sample. Produce some audio effects too. In my project, it's implemented as custom hardware. All feature are implemented except noise generation, GAIN volume enveloppe and gaussian interpolation.
An FPGA is a device that allow you to prototype hardware designs. More info on Wikipedia.
To test my project, the university lended me an Altera DE2 board. This board contain an Cyclone II FPGA, SRAM, SDRAM and FLASH memory, audio CODEC, switches, leds and bunch of goodies.
Hardware parts are written in VHDL. The DSP core has been written with rapid prototyping techniques based on C langage. Since performance isn't an issue, it's designed as a giant machine state (with more than 100 states!).
(click to enlarge)
This is the projet's top level schematic. As you can see, the sound generating entities are contained in a SOPC. The generated sound is push in a FIFO. At the other side of the FIFO, samples are serialized to the audio codec.
Here is the project directory : download
Read included instrution.txt
You will need :
A DE2 board
Quartus II 7.1 (or 7.2 with classic SOPC option)
NIOS II IDE
Note : include some part of SNES9X. See included license.txt